Growing delicate 2D and 3D semiconductor structures by locally heating a precursor film

The new direct patterning procedure for semiconductors provides the possibility to create new, delicate layouts and designs for micro- and nanoelectronics.
The invention is based on a simple lithography process that can be used to create 2D and 3D semiconductor structures as small as 20nm without masks or etching side effects.

The technologies for manufacturing micro- and nano­electronics have been developed over years and have now reached a rather sophisticated level.

Still major prob­lems remain, which are inherent to the applied method. One disadvantage of conventional lithography is that it comprises a number of complex process steps.

To create small semiconductor structures a continuous layer of material has to be deposited on the substrate. In a next step, a resist is put on top of the semiconductor. Using a mask to shade parts of the resist, the desired structure is then written into the resist. In a further step parts of the resist are removed to reveal the underlying semiconductor. Only then parts of the semiconductor are removed by an etching step. After this step the desired 2-dimensional structure is revealed.

The applied method of direct patterning is very simple and provides the possibility to fashion new structures and to simplify the manufacturing process.

So far direct patterning has only been utilized to create metal structures but was not applied to semiconductors. This invention shows that semiconductors can also be deposited by direct patterning. This is made possible by using a special precursor solution. By locally heating the precursor solution, e.g. employing electron beam or confocal laser irradiation, a phase transition is induced.

As a consequence the areas exposed to local heating remain on the substrate during the rinsing process. Finally, the crystallisation is accomplished at an elevated temperature during the annealing step.

This invention finally enables users to create individual layouts for testing and developing. The applied chemicals can be non-toxic. As a consequence it is possible to work with reduced safety regulations and thus with lower costs.

• Individual layout design at low costs
• 2D and 3D semiconductor structures ≥ 20nm
• No etching side effects
• Element doping of semiconductor is possible (e.g. Se doped Sb₂S₃)
• Simple lithography process, no mask needed
• Nontoxic materials can be used

• Manufacture of Microelectronics
• Manufacture of Nanoelectronics

Wang, W., Pfeiffer, P., Schmidt‐Mende, L.
"Direct Patterning of Metal Chalcogenide Semiconductor Materials."
Adv. Funct. Mater. 2020, 2002685.
https://doi.org/10.1002/adfm.202002685